Deep neural networks (DNNs) are widely applied to artificial intelligence applications, achieving promising performance at the cost of massive computation, large power consumption, and high latency. Diverse solutions have been proposed to cope with the challenge of latency and power consumption, including light-weight neural networks and efficient hardware accelerators. Moreover, research on quantization reduces the cost of computation and shows the error resiliency of DNNs. To improve the latency and power efficiency of hardware accelerators by exploiting the error resiliency, we propose an application-specific optimization method for the automatic design of approximate multipliers for DNNs. The proposed method optimizes an approximate multiplier by minimizing the error according to the probability distributions extracted from DNNs. By applying the optimized approximate multiplier to a DNN, we obtain 1.60%, 15.32%, and 20.19% higher accuracies than the best reproduced approximate multiplier on the widely used MNIST, FashionMNIST, and CIFAR-10 datasets, respectively, with 12.17% smaller area, 23.38% less power consumption, and 16.53% lower latency. Compared with an exact multiplier, the optimized multiplier reduces the area, power consumption, and latency by 36.88%, 52.45%, and 26.63%, respectively. Applied to FPGA-based and ASIC-based DNN accelerator modules, our approximate multiplier obtains low LUT utilization and small area respectively with competitive max frequency and power consumption, which shows the effectiveness of the proposed method in reducing the hardware cost of DNN accelerators.

本研究提出了一种针对近似乘法器的优化方法，通过操作数分布最小化平均误差。我们的方法在 DNN 中获得比已有的最佳近似乘法器高达 50.24% 的精度、15.76% 更小的面积、25.05% 较少的电功率消耗和 3.50% 较短的延迟。与精确乘法器相比，我们的方法可以减少 44.94% 的面积、47.63% 的电功率消耗和 16.78% 的延迟，同时精度损失可以忽略不计。在测试的 DNN 加速模块中，我们的乘法器比原始模块面积小 18.70%、电功率消耗少 9.99%。

HEAM：用于深度神经网络的高效近似乘法器优化