While graph neural networks (GNNs) have gained popularity for learning circuit representations in various electronic design automation (EDA) tasks, they face challenges in scalability when applied to large graphs and exhibit limited generalizability to new designs. These limitations make them less practical for addressing large-scale, complex circuit problems. In this work we propose HOGA, a novel attention-based model for learning circuit representations in a scalable and generalizable manner. HOGA first computes hop-wise features per node prior to model training. Subsequently, the hop-wise features are solely used to produce node representations through a gated self-attention module, which adaptively learns important features among different hops without involving the graph topology. As a result, HOGA is adaptive to various structures across different circuits and can be efficiently trained in a distributed manner. To demonstrate the efficacy of HOGA, we consider two representative EDA tasks: quality of results (QoR) prediction and functional reasoning. Our experimental results indicate that (1) HOGA reduces estimation error over conventional GNNs by 46.76% for predicting QoR after logic synthesis; (2) HOGA improves 10.0% reasoning accuracy over GNNs for identifying functional blocks on unseen gate-level netlists after complex technology mapping; (3) The training time for HOGA almost linearly decreases with an increase in computing resources.

HOGA是一种基于注意力机制的模型，能够在大规模、复杂电路问题中可扩展且具有泛化性，通过预先计算节点的逐跳特征并使用门控自注意力模块生成节点表示，自适应地学习不同跳之间的重要特征，因而适应不同电路结构，可在分布式环境下高效训练。在实验证明，与常规图神经网络相比，HOGA在逻辑综合后的结果质量预测方面减少了46.76%的估计误差，在复杂技术映射后的看不见门级网络列表上识别功能块方面，HOGA的推理准确率提高了10%，而HOGA的训练时间几乎与计算资源的增加成线性关系。

少即是多：基于跳数的图注意力用于电路的可扩展和通用学习