Compute-in-memory (CIM) accelerators using non-volatile memory (NVM) devices offer promising solutions for energy-efficient and low-latency Deep Neural Network (DNN) inference execution. However, practical deployment is often hindered by the challenge of dealing with the massive amount of model weight parameters impacted by the inherent device variations within non-volatile computing-in-memory (NVCIM) accelerators. This issue significantly offsets their advantages by increasing training overhead, the time needed for mapping weights to device states, energy consumption, and diminishing inference accuracy. To mitigate these challenges, we propose the "Tiny Shared Block (TSB)" method, which integrates a small shared 1x1 convolution block into the DNN architecture. This block is designed to stabilize feature processing across the network, effectively reducing the impact of device variation. Extensive experimental results show that TSB achieves over 20x inference accuracy gap improvement, over 5x training speedup, and weights-to-device mapping cost reduction while requiring less than 0.4% of the original weights to be write-verified during programming, when compared with state-of-the-art baseline solutions. Our approach provides a practical and efficient solution for deploying robust DNN models on NVCIM accelerators, making it a valuable contribution to the field of energy-efficient AI hardware.

通过在DNN架构中集成一个小的共享1x1卷积块，我们提出了“Tiny Shared Block (TSB)”方法，有效地减小了设备变异的影响，从而实现了超过20倍的推理准确性提升、超过5倍的训练加速和减少权重到设备映射成本，同时在编程期间只需要验证不到原始权重的0.4%。该方法为NVCIM加速器上部署稳健的DNN模型提供了实用和高效的解决方案，对于能效AI硬件领域具有重要贡献。

为在NVCIM加速器上高效部署DNN而设计的微小共享块