Analog layout synthesis faces significant challenges due to its dependence on
manual processes, considerable time requirements, and performance instability.
Current Bayesian Optimization (BO)-based techniques for analog layout
synthesis, despite their potential for automation, suffer from slow convergence
and extensive data needs, limiting their practical application. This paper
presents the \texttt{LLANA} framework, a novel approach that leverages Large
Language Models (LLMs) to enhance BO by exploiting the few-shot learning
abilities of LLMs for more efficient generation of analog design-dependent
parameter constraints. Experimental results demonstrate that \texttt{LLANA} not
only achieves performance comparable to state-of-the-art (SOTA) BO methods but
also enables a more effective exploration of the analog circuit design space,
thanks to LLM's superior contextual understanding and learning efficiency. The
code is available at https://github.com/dekura/LLANA.

该论文介绍了一种名为 LLANA 的框架，利用大型语言模型来增强 Bayesian Optimization（BO）技术，通过利用 LLM 的 few-shot learning 能力更高效地生成与模拟设计相关的参数约束，从而实现与最先进的 BO 方法相媲美的性能，并且通过 LLM 的文本理解和学习效率更有效地探索模拟电路设计空间。