High-level synthesis (HLS) is a design flow that leverages modern language
features and flexibility, such as complex data structures, inheritance,
templates, etc., to prototype hardware designs rapidly. However, exploring
various design space parameters can take much time and effort for hardware
engineers to meet specific design specifications. This paper proposes a novel
framework called AutoHLS, which integrates a deep neural network (DNN) with
Bayesian optimization (BO) to accelerate HLS hardware design optimization. Our
tool focuses on HLS pragma exploration and operation transformation. It
utilizes integrated DNNs to predict synthesizability within a given FPGA
resource budget. We also investigate the potential of emerging quantum neural
networks (QNNs) instead of classical DNNs for the AutoHLS pipeline. Our
experimental results demonstrate up to a 70-fold speedup in exploration time.

AutoHLS 是一种将深度神经网络（DNN）与贝叶斯优化（BO）相结合的新型框架，用于加速高级综合（HLS）硬件设计优化，通过整合 DNNs 来预测在给定 FPGA 资源预算内的可合成性，实验证明其在探索时间上可达到 70 倍的加速。