Achieving good speed and accuracy trade-off on a target platform is very
important in deploying deep neural networks in real world scenarios. However,
most existing automatic architecture search approaches only concentrate on high
performance. In this work, we propose an algorithm that can offer better
speed/accuracy trade-off of searched networks, which is termed "Partial Order
Pruning". It prunes the architecture search space with a partial order
assumption to automatically search for the architectures with the best speed
and accuracy trade-off. Our algorithm explicitly takes profile information
about the inference speed on the target platform into consideration. With the
proposed algorithm, we present several Dongfeng (DF) networks that provide high
accuracy and fast inference speed on various application GPU platforms. By
further searching decoder architectures, our DF-Seg real-time segmentation
networks yield state-of-the-art speed/accuracy trade-off on both the target
embedded device and the high-end GPU.

提出了一种名为 Partial Order Pruning 的自动体系结构搜索算法，该算法可提供具有最佳速度和准确度折衷的搜索网络的更好的速度 / 准确度折衷，此算法明确考虑了目标平台上推理速度的概要信息，通过搜索解码器体系结构，得到了 DF-Seg 实时分割网络，在目标嵌入式设备和高端 GPU 上提供了最先进的速度 / 准确度折衷。