The performance of deep learning algorithms such as neural networks (NNs) has
increased tremendously recently, and they can achieve state-of-the-art
performance in many domains. However, due to memory and computation resource
constraints, implementing NNs on edge devices is a challenging task. Therefore,
hardware accelerators such as computation-in-memory (CIM) with memristive
devices have been developed to accelerate the most common operations, i.e.,
matrix-vector multiplication. However, due to inherent device properties,
external environmental factors such as temperature, and an immature fabrication
process, memristors suffer from various non-idealities, including defects and
variations occurring during manufacturing and runtime. Consequently, there is a
lack of complete confidence in the predictions made by the model. To improve
confidence in NN predictions made by hardware accelerators in the presence of
device non-idealities, in this paper, we propose a Bayesian test vector
generation framework that can estimate the model uncertainty of NNs implemented
on memristor-based CIM hardware. Compared to the conventional point estimate
test vector generation method, our method is more generalizable across
different model dimensions and requires storing only one test Bayesian vector
in the hardware. Our method is evaluated on different model dimensions, tasks,
fault rates, and variation noise to show that it can consistently achieve
$100\%$ coverage with only $0.024$ MB of memory overhead.

在硬件加速器中实现基于神经网络的计算芯片的性能、缺陷与测试向量生成方法的改进和优化问题研究

少样本测试：使用贝叶斯测试向量估计记忆电阻深度神经网络的不确定性

Few-Shot Testing: Estimating Uncertainty of Memristive Deep Neural  Networks Using One Bayesian Test Vector

Neural networks (NNs) can achieved high performance in various fields such as
computer vision, and natural language processing. However, deploying NNs in
resource-constrained safety-critical systems has challenges due to uncertainty
in the prediction caused by out-of-distribution data, and hardware
non-idealities. To address the challenges of deploying NNs in
resource-constrained safety-critical systems, this paper summarizes the (4th
year) PhD thesis work that explores scalable and efficient methods for
uncertainty estimation and reduction in deep learning, with a focus on
Computation-in-Memory (CIM) using emerging resistive non-volatile memories. We
tackle the inherent uncertainties arising from out-of-distribution inputs and
hardware non-idealities, crucial in maintaining functional safety in automated
decision-making systems. Our approach encompasses problem-aware training
algorithms, novel NN topologies, and hardware co-design solutions, including
dropout-based \emph{binary} Bayesian Neural Networks leveraging spintronic
devices and variational inference techniques. These innovations significantly
enhance OOD data detection, inference accuracy, and energy efficiency, thereby
contributing to the reliability and robustness of NN implementations.

部署神经网络在资源受限的安全关键系统中面临不确定性和硬件非理想性所带来的挑战，该研究论文总结了一项 (四年级) 博士论文工作，该工作探索了深度学习中可扩展和高效的方法，包括计算内存 (Computation-in-Memory) 使用新兴的阻性非挥发性存储器来估计和降低不确定性。我们采用问题感知训练算法、新颖的神经网络拓扑结构和硬件协同设计解决方案，包括基于自旋电子器件的基于退化的二值贝叶斯神经网络和变分推理技术。这些创新显著提高了异常数据检测、推理准确性和能量效率，从而增加了神经网络实现的可靠性和鲁棒性。