Artificial intelligence (AI) algorithms based on neural networks have been
designed for decades with the goal of maximising some measure of accuracy. This
has led to two undesired effects. First, model complexity has risen
exponentially when measured in terms of computation and memory requirements.
Second, state-of-the-art AI models are largely incapable of providing
trustworthy measures of their uncertainty, possibly `hallucinating' their
answers and discouraging their adoption for decision-making in sensitive
applications.
With the goal of realising efficient and trustworthy AI, in this paper we
highlight research directions at the intersection of hardware and software
design that integrate physical insights into computational substrates,
neuroscientific principles concerning efficient information processing,
information-theoretic results on optimal uncertainty quantification, and
communication-theoretic guidelines for distributed processing. Overall, the
paper advocates for novel design methodologies that target not only accuracy
but also uncertainty quantification, while leveraging emerging computing
hardware architectures that move beyond the traditional von Neumann digital
computing paradigm to embrace in-memory, neuromorphic, and quantum computing
technologies. An important overarching principle of the proposed approach is to
view the stochasticity inherent in the computational substrate and in the
communication channels between processors as a resource to be leveraged for the
purpose of representing and processing classical and quantum uncertainty.

本文旨在实现高效可靠的人工智能，通过将物理洞察力、神经科学原理、信息论上的最优不确定性量化结果以及分布式处理的通信理论准则与计算基础相结合的硬件和软件设计的研究方向，倡导不仅关注准确性而且关注不确定性量化的新的设计方法论，利用新兴的计算硬件架构，摆脱传统的冯・诺依曼数字计算范式，采用内存计算、神经形态计算和量子计算技术。

通过硬件 - 算法 - 通信协同设计实现高效可信的 AI

Towards Efficient and Trustworthy AI Through  Hardware-Algorithm-Communication Co-Design

Recent breakthroughs in deep learning and artificial intelligence
technologies have enabled numerous mobile applications. While traditional
computation paradigms rely on mobile sensing and cloud computing, deep learning
implemented on mobile devices provides several advantages. These advantages
include low communication bandwidth, small cloud computing resource cost, quick
response time, and improved data privacy. Research and development of deep
learning on mobile and embedded devices has recently attracted much attention.
This paper provides a timely review of this fast-paced field to give the
researcher, engineer, practitioner, and graduate student a quick grasp on the
recent advancements of deep learning on mobile devices. In this paper, we
discuss hardware architectures for mobile deep learning, including Field
Programmable Gate Arrays, Application Specific Integrated Circuit, and recent
mobile Graphic Processing Units. We present Size, Weight, Area and Power
considerations and their relation to algorithm optimizations, such as
quantization, pruning, compression, and approximations that simplify
computation while retaining performance accuracy. We cover existing systems and
give a state-of-the-industry review of TensorFlow, MXNet, Mobile AI Compute
Engine, and Paddle-mobile deep learning platform. We discuss resources for
mobile deep learning practitioners, including tools, libraries, models, and
performance benchmarks. We present applications of various mobile sensing
modalities to industries, ranging from robotics, healthcare and multi-media,
biometrics to autonomous drive and defense. We address the key deep learning
challenges to overcome, including low quality data, and small
training/adaptation data sets. In addition, the review provides numerous
citations and links to existing code bases implementing various technologies.

本文综述了移动设备上深度学习的研究进展，包括算法、硬件架构、感知模态等技术的最新发展，以及对应的工具、应用和挑战。

移动设备上的深度学习 - 综述

Deep Learning on Mobile Devices - A Review

This paper introduces Tiramisu, a polyhedral framework designed to generate
high performance code for multiple platforms including multicores, GPUs, and
distributed machines. Tiramisu introduces a scheduling language with novel
extensions to explicitly manage the complexities that arise when targeting
these systems. The framework is designed for the areas of image processing,
stencils, linear algebra and deep learning. Tiramisu has two main features: it
relies on a flexible representation based on the polyhedral model and it has a
rich scheduling language allowing fine-grained control of optimizations.
Tiramisu uses a four-level intermediate representation that allows full
separation between the algorithms, loop transformations, data layouts, and
communication. This separation simplifies targeting multiple hardware
architectures with the same algorithm. We evaluate Tiramisu by writing a set of
image processing, deep learning, and linear algebra benchmarks and compare them
with state-of-the-art compilers and hand-tuned libraries. We show that Tiramisu
matches or outperforms existing compilers and libraries on different hardware
architectures, including multicore CPUs, GPUs, and distributed machines.

介绍了 Tiramisu，这是一个多面体框架，可以在多平台上生成高性能代码，包括多核，GPU 和分布式机器。Tiramisu 引入了一种调度语言，通过创新的扩展来明确管理在针对这些系统时出现的复杂性。该框架为图像处理，模板，线性代数和深度学习领域设计。