Deep neural network (DNN) latency characterization is a time-consuming
process and adds significant cost to Neural Architecture Search (NAS) processes
when searching for efficient convolutional neural networks for embedded vision
applications. DNN Latency is a hardware dependent metric and requires direct
measurement or inference on target hardware. A recently introduced latency
estimation technique known as MAPLE predicts DNN execution time on previously
unseen hardware devices by using hardware performance counters. Leveraging
these hardware counters in the form of an implicit prior, MAPLE achieves
state-of-the-art performance in latency prediction. Here, we propose MAPLE-X
which extends MAPLE by incorporating explicit prior knowledge of hardware
devices and DNN architecture latency to better account for model stability and
robustness. First, by identifying DNN architectures that exhibit a similar
latency to each other, we can generate multiple virtual examples to
significantly improve the accuracy over MAPLE. Secondly, the hardware
specifications are used to determine the similarity between training and test
hardware to emphasize training samples captured from comparable devices
(domains) and encourages improved domain alignment. Experimental results using
a convolution neural network NAS benchmark across different types of devices,
including an Intel processor that is now used for embedded vision applications,
demonstrate a 5% improvement over MAPLE and 9% over HELP. Furthermore, we
include ablation studies to independently assess the benefits of virtual
examples and hardware-based sample importance.

本篇论文提出了一种基于 MAPLE-X 的 DNN 延迟估计技术，它将显式先验知识与硬件设备和 DNN 架构延迟结合，以更好地考虑模型稳定性和鲁棒性，并在嵌入式视觉应用程序的 Intel 处理器等不同类型的设备上获得 5％的 MAPLE 改进和 9％的 HELP 改进。

MAPLE-X: 显式微处理器先验知识下的延迟预测

MAPLE-X: Latency Prediction with Explicit Microprocessor Prior Knowledge

Controllers of security-critical cyber-physical systems, like the power grid,
are a very important class of computer systems. Attacks against the control
code of a power-grid system, especially zero-day attacks, can be catastrophic.
Earlier detection of the anomalies can prevent further damage. However,
detecting zero-day attacks is extremely challenging because they have no known
code and have unknown behavior. Furthermore, if data collected from the
controller is transferred to a server through networks for analysis and
detection of anomalous behavior, this creates a very large attack surface and
also delays detection.
In order to address this problem, we propose Reconstruction Error
Distribution (RED) of Hardware Performance Counters (HPCs), and a data-driven
defense system based on it. Specifically, we first train a temporal deep
learning model, using only normal HPC readings from legitimate processes that
run daily in these power-grid systems, to model the normal behavior of the
power-grid controller. Then, we run this model using real-time data from
commonly available HPCs. We use the proposed RED to enhance the temporal deep
learning detection of anomalous behavior, by estimating distribution deviations
from the normal behavior with an effective statistical test. Experimental
results on a real power-grid controller show that we can detect anomalous
behavior with high accuracy (>99.9%), nearly zero false positives and short
(<360ms) latency.

通过使用硬件性能计数器的重构误差分布和基于数据的防御系统，我们能够高精度地（>99.9％）检测电网控制器的异常行为，几乎没有误报率（零误报）并且延迟较短（<360ms）。