In recent years, hardware-accelerated neural networks have gained significant
attention for edge computing applications. Among various hardware options,
crossbar arrays, offer a promising avenue for efficient storage and
manipulation of neural network weights. However, the transition from trained
floating-point models to hardware-constrained analog architectures remains a
challenge. In this work, we combine a quantization technique specifically
designed for such architectures with a novel self-correcting mechanism. By
utilizing dual crossbar connections to represent both the positive and negative
parts of a single weight, we develop an algorithm to approximate a set of
multiplicative weights. These weights, along with their differences, aim to
represent the original network's weights with minimal loss in performance. We
implement the models using IBM's aihwkit and evaluate their efficacy over time.
Our results demonstrate that, when paired with an on-chip pulse generator, our
self-correcting neural network performs comparably to those trained with
analog-aware algorithms.

近年来，硬件加速神经网络在边缘计算应用中引起了重视。在各种硬件选项中，交叉阵列为神经网络权重的高效存储和操作提供了有希望的途径。然而，从经过训练的浮点模型转向硬件约束的模拟体系结构仍然是一个挑战。在这项工作中，我们将一种专为这种体系结构设计的量化技术与一种新颖的自校正机制相结合。通过利用双交叉栏连接来表示单个权重的正负部分，我们开发了一种算法来近似一组乘法权重。这些权重以及它们的差异旨在以最小的性能损失来表示原始网络的权重。我们使用 IBM 的 aihwkit 实现了这些模型，并随时间评估了它们的效力。我们的结果表明，当与芯片上的脉冲发生器配对时，我们的自校正神经网络在性能上与那些经过模拟感知算法训练的网络相当。