Macro placement is a critical phase in chip design, which becomes more
intricate when involving general rectilinear macros and layout areas.
Furthermore, macro placement that incorporates human-like constraints, such as
design hierarchy and peripheral bias, has the potential to significantly reduce
the amount of additional manual labor required from designers. This study
proposes a methodology that leverages an approach suggested by Google's Circuit
Training (G-CT) to provide a learning-based macro placer that not only supports
placing rectilinear cases, but also adheres to crucial human-like design
principles. Our experimental results demonstrate the effectiveness of our
framework in achieving power-performance-area (PPA) metrics and in obtaining
placements of high quality, comparable to those produced with human
intervention. Additionally, our methodology shows potential as a generalized
model to address diverse macro shapes and layout areas.

该研究提出了一种利用 Google 的电路训练方法 (G-CT) 的方法，提供了一种基于学习的宏放置器，不仅支持放置矩形案例，而且遵循重要的人类设计原则，实验证明了该框架在实现功耗 - 性能 - 面积（PPA）指标上的有效性和与人工干预产生的高质量放置的可比性，并且该方法显示出解决不同宏形状和布局区域的潜力。