Global placement is a fundamental step in VLSI physical design. The wide use
of 2D processing element (PE) arrays in machine learning accelerators poses new
challenges of scalability and Quality of Results (QoR) for state-of-the-art
academic global placers. In this work, we develop DG-RePlAce, a new and fast
GPU-accelerated global placement framework built on top of the OpenROAD
infrastructure, which exploits the inherent dataflow and datapath structures of
machine learning accelerators. Experimental results with a variety of machine
learning accelerators using a commercial 12nm enablement show that, compared
with RePlAce (DREAMPlace), our approach achieves an average reduction in routed
wirelength by 10% (7%) and total negative slack (TNS) by 31% (34%), with faster
global placement and on-par total runtimes relative to DREAMPlace. Empirical
studies on the TILOS MacroPlacement Benchmarks further demonstrate that
post-route improvements over RePlAce and DREAMPlace may reach beyond the
motivating application to machine learning accelerators.

本研究提出了一种基于 GPU 加速和 OpenROAD 基础设施的快速全局布局框架 DG-RePlAce，通过利用机器学习加速器的固有数据流和数据路径结构，实现了路由线长度减少 10％（7％）和总负预留时间减少 31％（34％），并且全局布局速度更快，总运行时间与 DREAMPlace 相当。实证研究还表明，对于机器学习加速器，相较于 RePlAce 和 DREAMPlace，在后续路由中的改进效果可能超出原始应用。

DG-RePlAce：数据流驱动的 GPU 加速机器学习加速器分配框架

DG-RePlAce: A Dataflow-Driven GPU-Accelerated Analytical Global  Placement Framework for Machine Learning Accelerators

The demand for efficient machine learning (ML) accelerators is growing
rapidly, driving the development of novel computing concepts such as resistive
random access memory (RRAM)-based tiled computing-in-memory (CIM)
architectures. CIM allows to compute within the memory unit, resulting in
faster data processing and reduced power consumption. Efficient compiler
algorithms are essential to exploit the potential of tiled CIM architectures.
While conventional ML compilers focus on code generation for CPUs, GPUs, and
other von Neumann architectures, adaptations are needed to cover CIM
architectures. Cross-layer scheduling is a promising approach, as it enhances
the utilization of CIM cores, thereby accelerating computations. Although
similar concepts are implicitly used in previous work, there is a lack of clear
and quantifiable algorithmic definitions for cross-layer scheduling for tiled
CIM architectures. To close this gap, we present CLSA-CIM, a cross-layer
scheduling algorithm for tiled CIM architectures. We integrate CLSA-CIM with
existing weight-mapping strategies and compare performance against
state-of-the-art (SOTA) scheduling algorithms. CLSA-CIM improves the
utilization by up to 17.9 x , resulting in an overall speedup increase of up to
29.2 x compared to SOTA.

在本文中，我们介绍了一种适用于瓦片式计算内存架构的跨层调度算法 CLSA-CIM，通过将其与现有的权重映射策略相结合，与最先进的调度算法进行性能比较，提高了最多 17.9 倍的利用率，从而使整体速度提高了最多 29.2 倍。

CLSA-CIM: 计算内存架构中的跨层调度方法

CLSA-CIM: A Cross-Layer Scheduling Approach for Computing-in-Memory  Architectures

Formal verification of neural networks (NNs) is a challenging and important
problem. Existing efficient complete solvers typically require the
branch-and-bound (BaB) process, which splits the problem domain into
sub-domains and solves each sub-domain using faster but weaker incomplete
verifiers, such as Linear Programming (LP) on linearly relaxed sub-domains. In
this paper, we propose to use the backward mode linear relaxation based
perturbation analysis (LiRPA) to replace LP during the BaB process, which can
be efficiently implemented on the typical machine learning accelerators such as
GPUs and TPUs. However, unlike LP, LiRPA when applied naively can produce much
weaker bounds and even cannot check certain conflicts of sub-domains during
splitting, making the entire procedure incomplete after BaB. To address these
challenges, we apply a fast gradient based bound tightening procedure combined
with batch splits and the design of minimal usage of LP bound procedure,
enabling us to effectively use LiRPA on the accelerator hardware for the
challenging complete NN verification problem and significantly outperform
LP-based approaches. On a single GPU, we demonstrate an order of magnitude
speedup compared to existing LP-based approaches.

使用反向模式线性松弛基于摄动分析来替代线性规划，在机器学习加速器上实现快速的神经网络形式验证，并通过快速梯度基础收紧过程的结合，有效地使用了 LiRPA。