Reservoir computing (RC) offers a neuromorphic framework that is particularly
effective for processing spatiotemporal signals. Known for its temporal
processing prowess, RC significantly lowers training costs compared to
conventional recurrent neural networks. A key component in its hardware
deployment is the ability to generate dynamic reservoir states. Our research
introduces a novel dual-memory RC system, integrating a short-term memory via a
WOx-based memristor, capable of achieving 16 distinct states encoded over 4
bits, and a long-term memory component using a TiOx-based memristor within the
readout layer. We thoroughly examine both memristor types and leverage the RC
system to process temporal data sets. The performance of the proposed RC system
is validated through two benchmark tasks: isolated spoken digit recognition
with incomplete inputs and Mackey-Glass time series prediction. The system
delivered an impressive 98.84% accuracy in digit recognition and sustained a
low normalized root mean square error (NRMSE) of 0.036 in the time series
prediction task, underscoring its capability. This study illuminates the
adeptness of memristor-based RC systems in managing intricate temporal
challenges, laying the groundwork for further innovations in neuromorphic
computing.

我们的研究引入了一种新型的双存储器 RC 系统，通过基于 WOx 的忆阻器实现 16 个不同状态的编码和基于 TiOx 的忆阻器实现长期记忆单元，实现了处理时间数据集的能力。通过对孤立语音数字识别和 Mackey-Glass 时间序列预测的基准任务的验证，该系统在数字识别中达到了 98.84% 的准确率，在时间序列预测任务中保持了较低的规范化均方根误差（NRMSE）0.036，突出了其能力。本研究揭示了基于忆阻器的 RC 系统在处理复杂时间挑战方面的能力，为神经形态计算的进一步创新奠定了基础。

基于分析和全基于电阻忆阻器的蓄能池计算用于时间数据分类

Analysis and Fully Memristor-based Reservoir Computing for Temporal Data  Classification

The need for deep neural network (DNN) models with higher performance and
better functionality leads to the proliferation of very large models. Model
training, however, requires intensive computation time and energy.
Memristor-based compute-in-memory (CIM) modules can perform vector-matrix
multiplication (VMM) in situ and in parallel, and have shown great promises in
DNN inference applications. However, CIM-based model training faces challenges
due to non-linear weight updates, device variations, and low-precision in
analog computing circuits. In this work, we experimentally implement a
mixed-precision training scheme to mitigate these effects using a
bulk-switching memristor CIM module. Lowprecision CIM modules are used to
accelerate the expensive VMM operations, with high precision weight updates
accumulated in digital units. Memristor devices are only changed when the
accumulated weight update value exceeds a pre-defined threshold. The proposed
scheme is implemented with a system-on-chip (SoC) of fully integrated analog
CIM modules and digital sub-systems, showing fast convergence of LeNet training
to 97.73%. The efficacy of training larger models is evaluated using realistic
hardware parameters and shows that that analog CIM modules can enable efficient
mix-precision DNN training with accuracy comparable to full-precision software
trained models. Additionally, models trained on chip are inherently robust to
hardware variations, allowing direct mapping to CIM inference chips without
additional re-training.

研究了一种使用模拟计算模块和数字系统的混合精度训练方案，在实验中采用了 memristor-based 计算存储内存模块，成功实现了针对大型深度神经网络的有效训练，并评估了模型的抗硬件变化特性。

基于大规模开关式忆阻器的计算即存储模块用于深度神经网络训练

Bulk-Switching Memristor-based Compute-In-Memory Module for Deep Neural  Network Training

The high computation and memory storage of large deep neural networks (DNNs)
models pose intensive challenges to the conventional Von-Neumann architecture,
incurring substantial data movements in the memory hierarchy. The memristor
crossbar array has emerged as a promising solution to mitigate the challenges
and enable low-power acceleration of DNNs. Memristor-based weight pruning and
weight quantization have been seperately investigated and proven effectiveness
in reducing area and power consumption compared to the original DNN model.
However, there has been no systematic investigation of memristor-based
neuromorphic computing (NC) systems considering both weight pruning and weight
quantization. In this paper, we propose an unified and systematic
memristor-based framework considering both structured weight pruning and weight
quantization by incorporating alternating direction method of multipliers
(ADMM) into DNNs training. We consider hardware constraints such as crossbar
blocks pruning, conductance range, and mismatch between weight value and real
devices, to achieve high accuracy and low power and small area footprint. Our
framework is mainly integrated by three steps, i.e., memristor-based ADMM
regularized optimization, masked mapping and retraining. Experimental results
show that our proposed framework achieves 29.81X (20.88X) weight compression
ratio, with 98.38% (96.96%) and 98.29% (97.47%) power and area reduction on
VGG-16 (ResNet-18) network where only have 0.5% (0.76%) accuracy loss, compared
to the original DNN models. We share our models at link this http URL

这篇论文提出了一种统一而系统的基于忆阻器的框架，考虑了结构化权重剪枝和权重量化，并将交替方向乘子法（ADMM）纳入深度神经网络（DNN）训练中，以实现高准确度、低功耗和小面积占用率。在 VGG-16（ResNet-18）网络上，与原始 DNN 模型相比，该框架实现了 29.81X（20.88X）的权重压缩比，98.38％（96.96％）和 98.29％（97.47％）的功耗和面积降低，并仅有 0.5％（0.76％）的精度损失。