Multiplication is a fundamental operation in many applications, and
multipliers are widely adopted in various circuits. However, optimizing
multipliers is challenging and non-trivial due to the huge design space. In
this paper, we propose RL-MUL, a multiplier design optimization framework based
on reinforcement learning. Specifically, we utilize matrix and tensor
representations for the compressor tree of a multiplier, based on which the
convolutional neural networks can be seamlessly incorporated as the agent
network. The agent can learn to optimize the multiplier structure based on a
Pareto-driven reward which is customized to accommodate the trade-off between
area and delay. Additionally, the capability of RL-MUL is extended to optimize
the fused multiply-accumulator (MAC) designs. Experiments are conducted on
different bit widths of multipliers. The results demonstrate that the
multipliers produced by RL-MUL can dominate all baseline designs in terms of
area and delay. The performance gain of RL-MUL is further validated by
comparing the area and delay of processing element arrays using multipliers
from RL-MUL and baseline approaches.

基于强化学习的乘法器设计优化框架 RL-MUL，通过使用矩阵和张量表示将卷积神经网络无缝地融入乘法器的压缩器树，实现了乘法器结构的优化，以适应面积和延迟之间的权衡，并扩展到优化融合乘加器设计。实验证明，RL-MUL 产生的乘法器在面积和延迟方面优于基准设计，并通过比较使用 RL-MUL 和基准方法得到的乘法器的处理单元阵列的面积和延迟进一步验证了 RL-MUL 的性能提升。