This paper presents MicroNAS, a system designed to automatically search and
generate neural network architectures capable of classifying time series data
on resource-constrained microcontrollers (MCUs) and generating standard tf-lite
ML models. MicroNAS takes into account user-defined constraints on execution
latency and peak memory consumption on a target MCU. This approach ensures that
the resulting neural network architectures are optimised for the specific
constraints and requirements of the MCU on which they are implemented. To
achieve this, MicroNAS uses a look-up table estimation approach for accurate
execution latency calculations, with a minimum error of only 1.02ms. This
accurate latency estimation on MCUs sets it apart from other hardware-aware
neural architecture search (HW-NAS) methods that use less accurate estimation
techniques. Finally, MicroNAS delivers performance close to that of
state-of-the-art models running on desktop computers, achieving high
classification accuracies on recognised datasets (93.93% on UCI-HAR and 96.33%
on SkodaR) while running on a Cortex-M4 MCU.

MicroNAS 是一个系统，能够自动搜索和生成神经网络体系结构，用于分类时间序列数据，应用于资源受限的微控制器 (MCUs)，并生成标准 tf-lite ML 模型。

MicroNAS: 基于内存和延迟限制的面向微控制器的时间序列分类硬件感知神经架构搜索

MicroNAS: Memory and Latency Constrained Hardware-Aware Neural  Architecture Search for Time Series Classification on Microcontrollers

Tiny machine learning (TinyML) is a rapidly growing field aiming to
democratize machine learning (ML) for resource-constrained microcontrollers
(MCUs). Given the pervasiveness of these tiny devices, it is inherent to ask
whether TinyML applications can benefit from aggregating their knowledge.
Federated learning (FL) enables decentralized agents to jointly learn a global
model without sharing sensitive local data. However, a common global model may
not work for all devices due to the complexity of the actual deployment
environment and the heterogeneity of the data available on each device. In
addition, the deployment of TinyML hardware has significant computational and
communication constraints, which traditional ML fails to address. Considering
these challenges, we propose TinyReptile, a simple but efficient algorithm
inspired by meta-learning and online learning, to collaboratively learn a solid
initialization for a neural network (NN) across tiny devices that can be
quickly adapted to a new device with respect to its data. We demonstrate
TinyReptile on Raspberry Pi 4 and Cortex-M4 MCU with only 256-KB RAM. The
evaluations on various TinyML use cases confirm a resource reduction and
training time saving by at least two factors compared with baseline algorithms
with comparable performance.

TinyReptile 是一种基于元学习和在线学习的有效算法，能够在资源受限的微型控制器之间协作性地学习神经网络的坚实初始化，并且相比具有类似性能的基准算法，能够至少将资源减少和训练时间节省两倍。