Learning and predicting the performance of given software configurations are
of high importance to many software engineering activities. While configurable
software systems will almost certainly face diverse running environments (e.g.,
version, hardware, and workload), current work often either builds performance
models under a single environment or fails to properly handle data from diverse
settings, hence restricting their accuracy for new environments. In this paper,
we target configuration performance learning under multiple environments. We do
so by designing SeMPL - a meta-learning framework that learns the common
understanding from configurations measured in distinct (meta) environments and
generalizes them to the unforeseen, target environment. What makes it unique is
that unlike common meta-learning frameworks (e.g., MAML and MetaSGD) that train
the meta environments in parallel, we train them sequentially, one at a time.
The order of training naturally allows discriminating the contributions among
meta environments in the meta-model built, which fits better with the
characteristic of configuration data that is known to dramatically differ
between different environments. Through comparing with 15 state-of-the-art
models under nine systems, our extensive experimental results demonstrate that
SeMPL performs considerably better on 89% of the systems with up to 99%
accuracy improvement, while being data-efficient, leading to a maximum of 3.86x
speedup. All code and data can be found at our repository:
this https URL

通过设计 SeMPL - 一个元学习框架，从在不同（元）环境中测量的配置中学习共同理解并将其推广到未知的目标环境，本文针对多个环境下的配置性能学习进行了研究，与 15 种最新技术模型进行对比实验，结果显示 SeMPL 在 89% 的系统上表现更好，准确性提高达到 99%，而且数据效率高，最大加速比达到 3.86 倍。

使用顺序元学习在多个环境中预测配置性能

Predicting Configuration Performance in Multiple Environments with  Sequential Meta-learning

Neural architectures and hardware accelerators have been two driving forces
for the progress in deep learning. Previous works typically attempt to optimize
hardware given a fixed model architecture or model architecture given fixed
hardware. And the dominant hardware architecture explored in this prior work is
FPGAs. In our work, we target the optimization of hardware and software
configurations on an industry-standard edge accelerator. We systematically
study the importance and strategies of co-designing neural architectures and
hardware accelerators. We make three observations: 1) the software search space
has to be customized to fully leverage the targeted hardware architecture, 2)
the search for the model architecture and hardware architecture should be done
jointly to achieve the best of both worlds, and 3) different use cases lead to
very different search outcomes. Our experiments show that the joint search
method consistently outperforms previous platform-aware neural architecture
search, manually crafted models, and the state-of-the-art EfficientNet on all
latency targets by around 1% on ImageNet top-1 accuracy. Our method can reduce
energy consumption of an edge accelerator by up to 2x under the same accuracy
constraint, when co-adapting the model architecture and hardware accelerator
configurations.

本研究系统研究了协同设计神经网络架构和硬件加速器的重要性和策略，发现不同的使用场景会导致非常不同的搜索结果，研究表明联合搜索方法在所有延迟目标上始终优于以前的面向平台的神经体系结构搜索、手动设计的模型和最先进的 EfficientNet，可将边缘加速器的能源消耗降低高达 2 倍。