Defect reduction planning plays a vital role in enhancing software quality
and minimizing software maintenance costs. By training a black box machine
learning model and "explaining" its predictions, explainable AI for software
engineering aims to identify the code characteristics that impact maintenance
risks. However, post-hoc explanations do not always faithfully reflect what the
original model computes. In this paper, we introduce CounterACT, a
Counterfactual ACTion rule mining approach that can generate defect reduction
plans without black-box models. By leveraging action rules, CounterACT provides
a course of action that can be considered as a counterfactual explanation for
the class (e.g., buggy or not buggy) assigned to a piece of code. We compare
the effectiveness of CounterACT with the original action rule mining algorithm
and six established defect reduction approaches on 9 software projects. Our
evaluation is based on (a) overlap scores between proposed code changes and
actual developer modifications; (b) improvement scores in future releases; and
(c) the precision, recall, and F1-score of the plans. Our results show that,
compared to competing approaches, CounterACT's explainable plans achieve higher
overlap scores at the release level (median 95%) and commit level (median
85.97%), and they offer better trade-off between precision and recall (median
F1-score 88.12%). Finally, we venture beyond planning and explore leveraging
Large Language models (LLM) for generating code edits from our generated plans.
Our results show that suggested LLM code edits supported by our plans are
actionable and are more likely to pass relevant test cases than vanilla LLM
code recommendations.

采用反事实行动规则挖掘方法的可解释人工智能计划能够提高软件的质量、降低软件维护成本，并通过生成代码修改建议来增强计划可操作性。

缺陷降低计划的行动规则挖掘

Mining Action Rules for Defect Reduction Planning

Instruction combiner (IC) is a critical compiler optimization pass, which
replaces a sequence of instructions with an equivalent and optimized
instruction sequence at basic block level. There can be thousands of
instruction-combining patterns which need to be frequently updated as new
coding idioms/applications and novel hardware evolve over time. This results in
frequent updates to the IC optimization pass thereby incurring considerable
human effort and high software maintenance costs. To mitigate these challenges
associated with the traditional IC, we design and implement a Neural
Instruction Combiner (NIC) and demonstrate its feasibility by integrating it
into the standard LLVM compiler optimization pipeline. NIC leverages neural
sequence-to-sequence (Seq2Seq) models for generating optimized encoded IR
sequence from the unoptimized encoded IR sequence. To the best of our
knowledge, ours is the first work demonstrating the feasibility of a neural
instruction combiner built into a full-fledged compiler pipeline. Given the
novelty of this task, we built a new dataset for training our NIC neural model.
We show that NIC achieves exact match results percentage of 72% for optimized
sequences as compared to traditional IC and neural machine translation metric
Bleu precision score of 0.94, demonstrating its feasibility in a production
compiler pipeline.

设计实现了一种基于神经网络的指令组合优化方案，结合 Seq2Seq 模型，可以有效减少软件维护成本，并通过 72% 的精确匹配结果和 0.94 的 Bleu 精度得分证明其在编译器管道中的可行性。