Large-scale datacenters often experience memory failures, where Uncorrectable
Errors (UEs) highlight critical malfunction in Dual Inline Memory Modules
(DIMMs). Existing approaches primarily utilize Correctable Errors (CEs) to
predict UEs, yet they typically neglect how these errors vary between different
CPU architectures, especially in terms of Error Correction Code (ECC)
applicability. In this paper, we investigate the correlation between CEs and
UEs across different CPU architectures, including X86 and ARM. Our analysis
identifies unique patterns of memory failure associated with each processor
platform. Leveraging Machine Learning (ML) techniques on production datasets,
we conduct the memory failure prediction in different processors' platforms,
achieving up to 15% improvements in F1-score compared to the existing
algorithm. Finally, an MLOps (Machine Learning Operations) framework is
provided to consistently improve the failure prediction in the production
environment.

大规模数据中心中的内存故障和无法纠正错误发生率之间的相关性，在不同的 CPU 架构中进行了调查和分析。利用机器学习技术在不同的处理器平台上进行了内存故障预测，并相比现有算法提高了 15% 的 F1 分数。最后，提供了一个 MLOps 框架，以在生产环境中持续改进故障预测。

跨 CPU 架构的内存故障预测研究

Investigating Memory Failure Prediction Across CPU Architectures

In large-scale datacenters, memory failure is a common cause of server
crashes, with uncorrectable errors (UEs) being a major indicator of Dual Inline
Memory Module (DIMM) defects. Existing approaches primarily focus on predicting
UEs using correctable errors (CEs), without fully considering the information
provided by error bits. However, error bit patterns have a strong correlation
with the occurrence of uncorrectable errors (UEs). In this paper, we present a
comprehensive study on the correlation between CEs and UEs, specifically
emphasizing the importance of spatio-temporal error bit information. Our
analysis reveals a strong correlation between spatio-temporal error bits and UE
occurrence. Through evaluations using real-world datasets, we demonstrate that
our approach significantly improves prediction performance by 15% in F1-score
compared to the state-of-the-art algorithms. Overall, our approach effectively
reduces the number of virtual machine interruptions caused by UEs by
approximately 59%.

通过对正确 able 错误和不可纠正错误的关联性进行综合研究，强调空时误差位信息的重要性，以减少 UE 引起的虚拟机中断约 59%。