We present a new high-level synthesis methodology for using large language
model tools to generate hardware designs. The methodology uses exclusively
open-source tools excluding the large language model. As a case study, we use
our methodology to generate a permuted congruential random number generator
design with a wishbone interface. We verify the functionality and quality of
the random number generator design using large language model-generated
simulations and the Dieharder randomness test suite. We document all the large
language model chat logs, Python scripts, Verilog scripts, and simulation
results used in the case study. We believe that our method of hardware design
generation coupled with the open source silicon 130 nm design tools will
revolutionize application-specific integrated circuit design. Our methodology
significantly lowers the bar to entry when building domain-specific computing
accelerators for the Internet of Things and proof of concept prototypes for
later fabrication in more modern process nodes.

我们提出了一种新的高级综合方法，利用大型语言模型工具生成硬件设计。该方法仅使用开源工具，不包括大型语言模型。通过一个案例研究，我们使用该方法生成了一个具有 wishbone 接口的置换同余随机数生成器设计。我们使用大型语言模型生成的仿真和 Dieharder 随机性测试套件验证了随机数生成器设计的功能和质量。我们记录了案例研究中使用的所有大型语言模型聊天记录、Python 脚本、Verilog 脚本和仿真结果。我们相信，我们的硬件设计生成方法与开源硅 130 纳米设计工具相结合，将彻底改变应用特定集成电路设计。我们的方法大大降低了构建物联网领域特定计算加速器和概念验证原型的门槛，以后可以在更现代的工艺节点进行制造。