We propose an optimization method for the automatic design of approximate
multipliers, which minimizes the average error according to the operand
distributions. Our multiplier achieves up to 50.24% higher accuracy than the
best reproduced approximate multiplier in DNNs, with 15.76% smaller area,
25.05% less power consumption, and 3.50% shorter delay. Compared with an exact
multiplier, our multiplier reduces the area, power consumption, and delay by
44.94%, 47.63%, and 16.78%, respectively, with negligible accuracy losses. The
tested DNN accelerator modules with our multiplier obtain up to 18.70% smaller
area and 9.99% less power consumption than the original modules.

本研究提出了一种针对近似乘法器的优化方法，通过操作数分布最小化平均误差。我们的方法在 DNN 中获得比已有的最佳近似乘法器高达 50.24% 的精度、15.76% 更小的面积、25.05% 较少的电功率消耗和 3.50% 较短的延迟。与精确乘法器相比，我们的方法可以减少 44.94% 的面积、47.63% 的电功率消耗和 16.78% 的延迟，同时精度损失可以忽略不计。在测试的 DNN 加速模块中，我们的乘法器比原始模块面积小 18.70%、电功率消耗少 9.99%。